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MC14585B Datasheet, PDF (1/8 Pages) ON Semiconductor – 4-Bit Magnitude Comparator | |||
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MC14585B
4-Bit Magnitude
Comparator
The MC14585B 4âBit Magnitude Comparator is constructed with
complementary MOS (CMOS) enhancement mode devices. The
circuit has eight comparing inputs (A3, B3, A2, B2, A1, B1, A0, B0),
three cascading inputs (A < B, A = B, and A > B), and three outputs (A
< B, A = B, and A > B). This device compares two 4âbit words (A and
B) and determines whether they are âless thanâ, âequal toâ, or âgreater
thanâ by a high level on the appropriate output. For words greater than
4âbits, units can be cascaded by connecting outputs (A > B), (A < B),
and (A = B) to the corresponding inputs of the next significant
comparator. Inputs (A < B), (A = B), and (A > B) on the least
significant (first) comparator are connected to a low, a high, and a low,
respectively.
Applications include logic in CPUâs, correction and/or detection of
instrumentation conditions, comparator in testers, converters, and
controls.
⢠Diode Protection on All Inputs
⢠Expandable
⢠Applicable to Binary or 8421âBCD Code
⢠Supply Voltage Range = 3.0 Vdc to 18 Vdc
⢠Capable of Driving Two Lowâpower TTL Loads or One Lowâpower
Schottky TTL Load over the Rated Temperature Range
⢠Can be Cascaded â See Fig. 3
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
â 0.5 to +18.0
V
Vin, Vout Input or Output Voltage Range â 0.5 to VDD + 0.5
V
(DC or Transient)
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation,
per Package (Note 3.)
500
mW
TA
Ambient Temperature Range
Tstg
Storage Temperature Range
TL
Lead Temperature
(8âSecond Soldering)
â 55 to +125
°C
â 65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic âP and D/DWâ Packages: â 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v highâimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIPâ16
P SUFFIX
CASE 648
SOICâ16
D SUFFIX
CASE 751B
SOEIAJâ16
F SUFFIX
CASE 966
MARKING
DIAGRAMS
16
MC14585BCP
AWLYYWW
1
16
14585B
AWLYWW
1
16
MC14585B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14585BCP
PDIPâ16
2000/Box
MC14585BD
SOICâ16
48/Rail
MC14585BDR2 SOICâ16 2500/Tape & Reel
MC14585BF
SOEIAJâ16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 â Rev. 3
Publication Order Number:
MC14585B/D
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