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MC14551B_14 Datasheet, PDF (1/9 Pages) ON Semiconductor – Quad 2-Channel Analog Multiplexer/Demultiplexer
MC14551B
Quad 2-Channel Analog
Multiplexer/Demultiplexer
The MC14551B is a digitally−controlled analog switch. This device
implements a 4PDT solid state switch with low ON impedance and
very low OFF Leakage current. Control of analog signals up to the
complete supply voltage range can be achieved.
Features
• Triple Diode Protection on All Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Analog Voltage Range (VDD − VEE) = 3.0 to 18 V
Note: VEE must be ≤ VSS
• Linearized Transfer Characteristics
• Low Noise − 12 nV√Cycle, f ≥ 1.0 kHz typical
• For Low RON, Use The HC4051, HC4052, or HC4053 High−Speed
CMOS Devices
• Switch Function is Break Before Make
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
(Referenced to VEE, VSS ≥ VEE)
VDD – 0.5 to + 18.0 V
Input or Output Voltage (DC or Transient) Vin, Vout – 0.5 to VDD V
(Referenced to VSS for Control Input and
+ 0.5
VEE for Switch I/O)
Input Current (DC or Transient),
per Control Pin
Iin
±10
mA
Switch Through Current
Isw
±25
mA
Power Dissipation, per Package (Note 1) PD
500
mW
Ambient Temperature Range
TA
– 55 to + 125 _C
Storage Temperature Range
Tstg
– 65 to + 150 _C
Lead Temperature (8–Second Soldering)
TL
260
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: −7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS ≤ (Vin or Vout) ≤ VDD for control inputs and VEE ≤ (Vin or Vout)
≤ VDD for Switch I/O.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS, VEE or VDD). Unused outputs must be left open.
http://onsemi.com
1
SOIC−16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
W1 1
X0 2
X1 3
X4
Y5
Y0 6
VEE 7
VSS 8
16 VDD
15 W0
14 W
13 Z
12 Z1
11 Z0
10 Y1
9 CONTROL
MARKING DIAGRAM
16
14551BG
AWLYWW
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 9
Publication Order Number:
MC14551B/D