MC14551B_06 Datasheet, PDF (1/10 Pages) ON Semiconductor – Quad 2−Channel Analog Multiplexer/Demultiplexer

MC14551B
Quad 2−Channel Analog
Multiplexer/Demultiplexer
The MC14551B is a digitally−controlled analog switch. This device
implements a 4PDT solid state switch with low ON impedance and
very low OFF Leakage current. Control of analog signals up to the
complete supply voltage range can be achieved.
Features
• Triple Diode Protection on All Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Analog Voltage Range (V_DD − V_EE) = 3.0 to 18 V
Note: V_EE must be v V_SS
• Linearized Transfer Characteristics
• Low Noise — 12 nV√Cycle, f ≥ 1.0 kHz typical
• For Low R_ON, Use The HC4051, HC4052, or HC4053 High−Speed
CMOS Devices
• Switch Function is Break Before Make
• Pb−Free Packages are Available*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
(Referenced to V_EE, V_SS ≥ V_EE)
V_DD – 0.5 to + 18.0 V
Input or Output Voltage (DC or Transient) V_in, V_out – 0.5 to V_DD V
(Referenced to V_SS for Control Input and
+ 0.5
V_EE for Switch I/O)
Input Current (DC or Transient),
per Control Pin
I_in
± 10
mA
Switch Through Current
I_sw
± 25
mA
Power Dissipation, per Package (Note 1) P_D
500
mW
Ambient Temperature Range
T_A
– 55 to + 125 _C
Storage Temperature Range
T_stg
– 65 to + 150 _C
Lead Temperature (8–Second Soldering) T_L
260
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: − 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD for control inputs and V_EE ≤ (V_in or V_out)
≤ V_DD for Switch I/O.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS, V_EE or V_DD). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP−16
MC14551BCP
P SUFFIX
AWLYYWWG
1
CASE 648
1
16
SOIC−16
D SUFFIX
CASE 751B
14551BG
AWLYWW
1
1
16
SOEIAJ−16
F SUFFIX
CASE 966
MC14551B
ALYWG
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 6
Publication Order Number:
MC14551B/D