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MC14543B_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – BCD−to−Seven Segment Latch/Decoder/Driver for Liquid Crystals
MC14543B
BCD−to−Seven Segment
Latch/Decoder/Driver for
Liquid Crystals
The MC14543B BCD−to−seven segment latch/decoder/driver is
designed for use with liquid crystal readouts, and is constructed with
complementary MOS (CMOS) enhancement mode devices. The
circuit provides the functions of a 4−bit storage latch and an 8421
BCD−to−seven segment decoder and driver. The device has the
capability to invert the logic levels of the output combination. The
phase (Ph), blanking (BI), and latch disable (LD) inputs are used to
reverse the truth table phase, blank the display, and store a BCD code,
respectively. For liquid crystal (LC) readouts, a square wave is applied
to the Ph input of the circuit and the electrically common backplane of
the display. The outputs of the circuit are connected directly to the
segments of the LC readout. For other types of readouts, such as
light−emitting diode (LED), incandescent, gas discharge, and
fluorescent readouts, connection diagrams are given on this data sheet.
Applications include instrument (e.g., counter, DVM etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
Features
• Latch Storage of Code
• Blanking Input
• Readout Blanking on All Illegal Input Combinations
• Direct LED (Common Anode or Cathode) Driving Capability
• Supply Voltage Range = 3.0 V to 18 V
• Capable of Driving 2 Low−power TTL Loads, 1 Low−power Schottky
TTL Load or 2 HTL Loads Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4056A (with Pin 7 Tied to VSS).
• Chip Complexity: 207 FETs or 52 Equivalent Gates
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
−0.5 to +18.0
V
Input Voltage Range, All Inputs
DC Input Current per Pin
Vin −0.5 to VDD +0.5 V
Iin
± 10
mA
Power Dissipation per Package (Note 1)
PD
500
mW
Operating Temperature Range
Storage Temperature Range
TA
−55 to +125 °C
Tstg
−65 to +150 °C
Maximum Continuous Output Drive
Current (Source or Sink)
IOHmax
10
mA
IOLmax
(per Output)
Maximum Continuous Output Power POHmax
70
mW
(Source or Sink) (Note 2)
POLmax (per Output)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
2. POHmax = IOH (VOH − VDD) and POLmax = IOL (VOL − VSS)
1
1
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16 16
P SUFFIX
CASE 648
1
MC14543BCP
AWLYYWWG
16
SOIC−16
D SUFFIX
CASE 751B
1
14543BG
AWLYWW
16
SOEIAJ−16
F SUFFIX
CASE 966
MC14543B
ALYWG
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated
voltages to this high−impedance circuit. For proper
operation, Vin and Vout should be constrained to the
range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either VSS or VDD). Unused
outputs must be left open.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 6
Publication Order Number:
MC14543B/D