MC14538B_05 Datasheet, PDF (1/12 Pages) ON Semiconductor – Dual Precision Retriggerable/Resettable Monostable Multivibrator

MC14538B
Dual Precision
Retriggerable/Resettable
Monostable Multivibrator
The MC14538B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an accurate output pulse over a wide range of widths, the
duration and accuracy of which are determined by the external timing
components, C_X and R_X. Output Pulse Width T = R_X @ C_X (secs)
R_X = W
C_X = Farads
Features
• Unlimited Rise and Fall Time Allowed on the A Trigger Input
• Pulse Width Range = 10 ms to 10 s
• Latched Trigger Inputs
• Separate Latched Reset Inputs
• 3.0 Vdc to 18 Vdc Operational Limits
• Triggerable from Positive (A Input) or Negative−Going Edge (B−Input)
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−pin Compatible with MC14528B and CD4528B (CD4098)
• Use the MC54/74HC4538A for Pulse Widths Less Than 10 ms with
Supplies Up to 6 V
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD
V_in, V_out
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to V_DD + 0.5
V
I_in, I_out Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D Power Dissipation, per Package
(Note 1)
500
mW
T_A
Operating Temperature Range
T_stg Storage Temperature Range
T_L
Lead Temperature
(8−Second Soldering)
−55 to +125
°C
−65 to +150
°C
260
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
© Semiconductor Components Industries, LLC, 2005
1
August, 2005 − Rev. 7
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16 ¹⁶
P SUFFIX
CASE 648
1
MC14538BCP
AWLYYWWG
SOIC−16
D SUFFIX
CASE 751B
16
14538BG
AWLYWW
1
16
SOIC−16
DW SUFFIX
CASE 751G
14538BG
AWLYYWW
1
TSSOP−16
DT SUFFIX
CASE 948F
16
14
538B
ALYW
1
SOEIAJ−16
F SUFFIX
CASE 966
16
MC14538B
ALYWG
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
MC14538B/D