MC14538B Datasheet, PDF (1/12 Pages) Motorola, Inc – DUAL PRECISION RETRIGGERABLE / RESETTABLE MONOSTABLE MULTIVIBRATOR

MC14538B
Dual Precision
Retriggerable/Resettable
Monostable Multivibrator
The MC14538B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an accurate output pulse over a wide range of widths, the
duration and accuracy of which are determined by the external timing
components, C_X and R_X.
Output Pulse Width = (Cx) (Rx) where:
Rx is in kW
Cx is in mF
• Unlimited Rise and Fall Time Allowed on the A Trigger Input
• Pulse Width Range = 10 µs to 10 s
• Latched Trigger Inputs
• Separate Latched Reset Inputs
• 3.0 Vdc to 18 Vdc Operational Limits
• Triggerable from Positive (A Input) or Negative–Going Edge
(B–Input)
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Pin–for–pin Compatible with MC14528B and CD4528B (CD4098)
• Use the MC54/74HC4538A for Pulse Widths Less Than 10 µs with
Supplies Up to 6 V.
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
– 0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range – 0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Operating Temperature Range
– 55 to +125
°C
T_stg
Storage Temperature Range
– 65 to +150
°C
T_L
Lead Temperature
(8–Second Soldering)
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v ^{high–impedance circuit. For proper operation, Vin and Vout should be constrained}
to the range V_SS (V_in or V_out) V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
MC14538BCP
CASE 648
AWLYYWW
1
16
SOIC–16
D SUFFIX
CASE 751B
1
14538B
AWLYWW
16
TSSOP–16
14
DT SUFFIX
538B
CASE 948F
ALYW
1
16
SOIC–16
DW SUFFIX
CASE 751G
14538B
AWLYYWW
1
16
SOEIAJ–16
F SUFFIX
CASE 966
MC14538B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14538BCP
PDIP–16
2000/Box
MC14538BD
SOIC–16
48/Rail
MC14538BDR2 SOIC–16 2500/Tape & Reel
MC14538BDT
TSSOP–16
96/Rail
MC14538BDTR2 TSSOP–16 2500/Tape & Reel
MC14538BDW
SOIC–16
47/Rail
MC14538BDWR2 SOIC–16 1000/Tape & Reel
MC14538BF
SOEIAJ–16 See Note 1.
MC14538BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14538B/D