MC14536B_14 Datasheet, PDF (1/15 Pages) ON Semiconductor – Programmable Timer

MC14536B
Programmable Timer
The MC14536B programmable timer is a 24−stage binary ripple
counter with 16 stages selectable by a binary code. Provisions for an
on−chip RC oscillator or an external clock are provided. An on−chip
monostable circuit incorporating a pulse−type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
Features
• 24 Flip−Flop Stages − Will Count From 2⁰ to 2²⁴
• Last 16 Stages Selectable By Four−Bit Select Code
• 8−Bypass Input Allows Bypassing of First Eight Stages
• Set and Reset Inputs
• Clock Inhibit and Oscillator Inhibit Inputs
• On−Chip RC Oscillator Provisions
• On−Chip Monostable Output Provisions
• Clock Conditioning Circuit Permits Operation with Very Long Rise
and Fall Times
• Test Mode Allows Fast Test Sequence
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Rating
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
V_DD
−0.5 to +18.0
V
V_in, −0.5 to V_DD + 0.5 V
V_out
I_in, I_out
±10
mA
Power Dissipation per Package (Note 1) P_D
500
mW
Ambient Temperature Range
T_A
−55 to +125
°C
Storage Temperature Range
T_stg
−65 to +150
°C
Lead Temperature, (8−Second Soldering) T_L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C from 65_C to 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
1
SOIC−16 WB
DW SUFFIX
CASE 751G
1
SOEIAJ−16
F SUFFIX
CASE 966
1
TSSOP−16
DT SUFFIX
CASE 948F
PIN ASSIGNMENT
SET 1
RESET 2
IN 1 3
OUT 1 4
OUT 2 5
8−BYPASS 6
CLOCK INH 7
V_SS 8
16 V_DD
15 MONO−IN
14 OSC INH
13 DECODE
12 D
11 C
10 B
9A
MARKING DIAGRAMS
14536B
AWLYWWG
1
SOIC−16 WB
16
14
536B
ALYWG
G
1
TSSOP−16
MC14536B
ALYWG
1
SOEIAJ−16
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
November, 2014 − Rev. 14
Publication Order Number:
MC14536B/D