MC14536B Datasheet, PDF (1/16 Pages) Motorola, Inc – PROGRAMMABLE TIMER

MC14536B
Programmable Timer
The MC14536B programmable timer is a 24–stage binary ripple
counter with 16 stages selectable by a binary code. Provisions for an
on–chip RC oscillator or an external clock are provided. An on–chip
monostable circuit incorporating a pulse–type output has been
included. By selecting the appropriate counter stage in conjunction
with the appropriate input clock frequency, a variety of timing can be
achieved.
• 24 Flip–Flop Stages — Will Count From 2⁰ to 2²⁴
• Last 16 Stages Selectable By Four–Bit Select Code
• 8–Bypass Input Allows Bypassing of First Eight Stages
• Set and Reset Inputs
• Clock Inhibit and Oscillator Inhibit Inputs
• On–Chip RC Oscillator Provisions
• On–Chip Monostable Output Provisions
• Clock Conditioning Circuit Permits Operation With Very Long Rise
and Fall Times
• Test Mode Allows Fast Test Sequence
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
– 0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range – 0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Operating Temperature Range
– 55 to +125
°C
T_stg
Storage Temperature Range
– 65 to +150
°C
T_L
Lead Temperature
(8–Second Soldering)
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v ^{high–impedance circuit. For proper operation, Vin and Vout should be constrained}
to the range V_SS (V_in or V_out) V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC14536BCP
AWLYYWW
1
16
SOIC–16
DW SUFFIX
CASE 751G
14536B
AWLYYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14536B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14536BCP
MC14536BDW
PDIP–16
SOIC–16
2000/Box
47/Rail
MC14536BDWR2 SOIC–16 1000/Tape & Reel
MC14536BF
SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 5
Publication Order Number:
MC14536B/D