MC14532B_06 Datasheet, PDF (1/7 Pages) ON Semiconductor – MC14532B_06

MC14532B
8−Bit Priority Encoder
The MC14532B is constructed with complementary MOS (CMOS)
enhancement mode devices. The primary function of a priority
encoder is to provide a binary address for the active input with the
highest priority. Eight data inputs (D0 thru D7) and an enable input
(E_in) are provided. Five outputs are available, three are address outputs
(Q0 thru Q2), one group select (GS) and one enable output (E_out).
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Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load over the Rated Temperature Range
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Rating
1
Symbol
Value
Unit
DC Supply Voltage Range
V_DD
−0.5 to +18.0 V
Input or Output Voltage Range
(DC or Transient)
V_in, −0.5 to V_DD + 0.5 V
V_out
MARKING
DIAGRAMS
1
PDIP−16
P SUFFIX
CASE 648
MC14532BCP
AWLYYWWG
Input or Output Current
(DC or Transient) per Pin
I_in, I_out
± 10
mA
Power Dissipation, per Package (Note 1) P_D
500
mW
Ambient Temperature Range
T_A
−55 to +125 °C
Storage Temperature Range
T_stg
−65 to +150 °C
Lead Temperature (8 Sec Soldering)
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
TRUTH TABLE
Input
Output
14532BG
SOIC−16
AWLYWW
1
D SUFFIX ₁
CASE 751B
A
= Assembly Location
WL = Wafer Lot
YY, Y = Year
WW = Work Week
G = Pb−Free Package
PIN ASSIGNMENT
D4 1
D5 2
D6 3
16 V_DD
15 _Eout
14 GS
E_in D7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 E_out
0 XXXXXXXX 0 0 0 0 0
1 00000000 0 0 0 0 1
1 1XXXXXXX 1 1 1 1 0
1 0 1XXXXXX 1 1 1 0 0
1 0 0 1XXXXX 1 1 0 1 0
1 0 0 0 1XXXX 1 1 0 0 0
D7 4
E_in 5
Q2 6
Q1 7
V_SS 8
13 D3
12 D2
11 D1
10 D0
9 Q0
1 0 0 0 0 1XXX 1 0 1 1 0
1 0 0 0 0 0 1XX 1 0 1 0 0
1 0000001X 1 0 0 1 0
1 00000001 1 0 0 0 0
X = Don’t Care
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
April, 2006 − Rev. 6
Publication Order Number:
MC14532B/D