MC14528B_14 Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual Monostable Multivibrato

MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
C_X and R_X.
Features
• Separate Reset Available
• Diode Protection on All Inputs
• Triggerable from Leading or Trailing Edge Pulse
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• This part should only be used in new designs where the pulse width
is < 10 ms
Note: For designs requiring a pulse width > 10 ms, please see
MC14538, which is pin−for−pin compatible
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Rating
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
V_DD
−0.5 to +18.0
V
V_in, V_out − 0.5 to V_DD + 0.5 V
Input or Output Current
(DC or Transient) per Pin
I_in, I_out
± 10
mA
Power Dissipation, per Package
P_D
(Note 1)
500
mW
Ambient Temperature Range
T_A
−55 to +125
°C
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
T_stg
−65 to +150
°C
T_L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
1
SOIC−16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
V_SS 1
C_X1/R_X1 2
RESET 1 3
A1 4
B1 5
Q1 6
Q1 7
V_SS 8
16 V_DD
15 V_SS
14 C_X2/R_X2
13 RESET 2
12 A2
11 B2
10 Q2
9 Q2
MARKING DIAGRAM
14528BG
AWLYWW
1
A
= Assembly Location
WL = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 9
Publication Order Number:
MC14528B/D