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MC14528B_06 Datasheet, PDF (1/9 Pages) ON Semiconductor – Dual Monostable Multivibrator
MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
CX and RX.
Features
• Separate Reset Available
• Diode Protection on All Inputs
• Triggerable from Leading or Trailing Edge Pulse
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• This part should only be used in new designs where the pulse width
is < 10 ms
Note: For designs requiring a pulse width > 10 ms, please see
MC14538, which is pin−for−pin compatible
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)
Rating
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
VDD
−0.5 to +18.0
V
Vin, Vout −0.5 to VDD + 0.5 V
Input or Output Current
(DC or Transient) per Pin
Iin, Iout
± 10
mA
Power Dissipation, per Package
PD
(Note 1)
500
mW
Ambient Temperature Range
TA
−55 to +125
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Lead Temperature
(8−Second Soldering)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
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MARKING
DIAGRAMS
MC14528BCP
AWLYYWWG
1
1
PDIP−16
P SUFFIX
CASE 648
14528BG
AWLYWW
1
SOIC−16
1
D SUFFIX
CASE 751B
1 SOEIAJ−16
F SUFFIX
CASE 966
MC14528B
ALYWG
1
A
= Assembly Location
WL = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
April, 2006 − Rev. 6
Publication Order Number:
MC14528B/D