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MC14526BDWR2G Datasheet, PDF (1/10 Pages) ON Semiconductor – Presettable 4-Bit Down Counters | |||
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MC14526B
Presettable 4-Bit Down
Counters
The MC14526B binary counter is constructed with MOS Pâchannel
and Nâchannel enhancement mode devices in a monolithic structure.
This device is presettable, cascadable, synchronous down counter
with a decoded â0â state output for divideâbyâN applications. In
single stage applications the â0â output is applied to the Preset Enable
input. The Cascade Feedback input allows cascade divideâbyâN
operation with no additional gates required. The Inhibit input allows
disabling of the pulse counting function. Inhibit may also be used as a
negative edge clock.
This complementary MOS counter can be used in frequency
synthesizers, phaseâlocked loops, and other frequency division
applications requiring low power dissipation and/or high noise
immunity.
Features
⢠Supply Voltage Range = 3.0 Vdc to 18 Vdc
⢠Logic EdgeâClocked Design: Incremented on Positive Transition of
Clock or Negative Transition of Inhibit
⢠Asynchronous Preset Enable
⢠Capable of Driving Two LowâPower TTL Loads or One LowâPower
Schottky TTL Load Over the Rated Temperature Range
⢠These Devices are PbâFree and are RoHS Compliant
⢠NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECâQ100
Qualified and PPAP Capable
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
VDD
â0.5 to +18.0
V
Vin, â0.5 to VDD + 0.5 V
Vout
Iin, Iout
±10
mA
Power Dissipation per Package (Note 1) PD
Operating Temperature Range
TA
Storage Temperature Range
Tstg
Lead Temperature
TL
(8âSecond Soldering)
500
mW
â55 to +125
°C
â65 to +150
°C
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic âP and D/DWâ Packages: â 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highâimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
MC14526BCP
AWLYYWWG
1
PDIPâ16 1
P SUFFIX
CASE 648
14526B
AWLYWWG
1 SOICâ16 WB
DW SUFFIX 1
CASE 751G
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= PbâFree Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
May, 2013 â Rev. 7
Publication Order Number:
MC14526B/D
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