MC14518B_14 Datasheet, PDF (1/7 Pages) ON Semiconductor – Dual Up Counters

MC14518B, MC14520B
Dual Up Counters
The MC14518B dual BCD counter and the MC14520B dual binary
counter are constructed with MOS P−channel and N−channel
enhancement mode devices in a single monolithic structure. Each
consists of two identical, independent, internally synchronous 4−stage
counters. The counter stages are type D flip−flops, with interchangeable
Clock and Enable lines for incrementing on either the positive−going or
negative−going transition as required when cascading multiple stages.
Each counter can be cleared by applying a high level on the Reset line.
In addition, the MC14518B will count out of all undefined states within
two clock periods. These complementary MOS up counters find
primary use in multi−stage synchronous or ripple counting applications
requiring low power dissipation and/or high noise immunity.
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Internal and External Speeds
• Logic Edge−Clocked Design − Incremented on Positive Transition of
Clock or Negative Transition on Enable
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
http://onsemi.com
SOIC−16 WB
DW SUFFIX
CASE 751G
PIN ASSIGNMENT
C_A 1
E_A 2
Q0_A 3
Q1_A 4
Q2_A 5
Q3_A 6
R_A 7
V_SS 8
16 V_DD
15 R_B
14 Q3_B
13 Q2_B
12 Q1_B
11 Q0_B
10 E_B
9 C_B
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 1)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
−0.5 to +18.0
V
MARKING DIAGRAM
16
V_in, V_out
I_in, I_out
P_D
T_A
T_stg
T_L
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 2)
Operating Temperature Range
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
−0.5 to V_DD + 0.5
V
±10
mA
500
mW
−55 to +125
°C
−65 to +150
°C
260
°C
145xxB
AWLYYWWG
1
xx
A
WL, L
YY, Y
WW, W
G
= 18 or 20
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V_in and V_out
should be constrained to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V_SS or V_DD). Unused outputs must be left open.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 8
Publication Order Number:
MC14518B/D