MC14504B_11 Datasheet, PDF (1/7 Pages) ON Semiconductor – Hex Level Shifter for TTL to CMOS or CMOS to CMOS

MC14504B
Hex Level Shifter for TTL to
CMOS or CMOS to CMOS
The MC14504B is a hex non−inverting level shifter using CMOS
technology. The level shifter will shift a TTL signal to CMOS logic
levels for any CMOS supply voltage between 5 and 15 volts. A control
input also allows interface from CMOS to CMOS at one logic level to
another logic level: Either up or down level translating is
accomplished by selection of power supply levels V_DD and V_CC. The
V_CC level sets the input signal levels while V_DD selects the output
voltage levels.
Features
• UP Translates from a Low to a High Voltage or DOWN Translates
from a High to a Low Voltage
• Input Threshold Can Be Shifted for TTL Compatibility
• No Sequencing Required on Power Supplies or Inputs for Power Up
or Power Down
• 3 to 18 Vdc Operation for V_DD and V_CC
• Diode Protected Inputs to V_SS
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_CC DC Supply Voltage Range
V_DD DC Supply Voltage Range
V_in
Input Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to +18.0
V
−0.5 to +18.0
V
V_out Output Voltage Range
(DC or Transient)
−0.5 to V_DD + 0.5 V
I_in, I_out Input or Output Current
(DC or Transient) per Pin
± 10
mA
P_D Power Dissipation, per Package
(Note 1)
500
mW
T_A
Ambient Temperature Range
T_stg Storage Temperature Range
T_L
Lead Temperature
(8−Second Soldering)
−55 to +125
°C
−65 to +150
°C
260
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
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MARKING
DIAGRAMS
PDIP−16 ¹⁶
P SUFFIX
CASE 648
1
MC14504BCP
AWLYYWWG
SOIC−16
D SUFFIX
CASE 751B
16
14504BG
AWLYWW
1
16
TSSOP−16
DT SUFFIX
CASE 948F
14
504B
ALYWG
G
1
SOEIAJ−16
F SUFFIX
CASE 966
16
MC14504B
ALYWG
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
June, 2011 − Rev. 7
Publication Order Number:
MC14504B/D