MC14175B Datasheet, PDF (1/8 Pages) ON Semiconductor – Quad Type D Flip-Flop

MC14175B
Quad Type D Flip-Flop
The MC14175B quad type D flip–flop is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Each of the four flip–flops is positive–edge
triggered by a common clock input (C). An active–low reset input (R)
asynchronously resets all flip–flops. Each flip–flop has independent
Data (D) inputs and complementary outputs (Q and Q). These devices
may be used as shift register elements or as type T flip–flops for
counter and toggle applications.
• Complementary Outputs
• Static Operation
• All Inputs and Outputs Buffered
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Output Compatible with Two Low–Power TTL Loads or One
Low–Power Schottky TTL Load
• Functional Equivalent to TTL 74175
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
–0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range –0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8–Second Soldering)
–55 to +125
°C
–65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC14175BCP
AWLYYWW
1
SOIC–16
D SUFFIX
CASE 751B
16
14175B
AWLYWW
1
SOEIAJ–16
F SUFFIX
CASE 966
16
MC14175B
ALYW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14175BCP
PDIP–16
2000/Box
MC14175BD
SOIC–16
48/Rail
MC14175BDR2 SOIC–16 2500/Tape & Reel
MC14175BF
SOEIAJ–16 See Note 1.
MC14175BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
August, 2000 – Rev. 4
Publication Order Number:
MC14175B/D