MC14093B Datasheet, PDF (1/8 Pages) ON Semiconductor – Quad 2-Input NAND Schmitt Trigger

MC14093B
Quad 2-Input NAND"
Schmitt Trigger
The MC14093B Schmitt trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14093B
may be used in place of the MC14011B quad 2–input NAND gate for
enhanced noise immunity or to “square up” slowly changing
waveforms.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
• Triple Diode Protection on All Inputs
• Pin–for–Pin Compatible with CD4093
• Can be Used to Replace MC14011B
• Independent Schmitt–Trigger at each Input
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
– 0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range – 0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
± 10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8–Second Soldering)
– 55 to +125
°C
– 65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v ^{high–impedance circuit. For proper operation, Vin and Vout should be constrained}
to the range V_SS (V_in or V_out) V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP–14
P SUFFIX
CASE 646
SOIC–14
D SUFFIX
CASE 751A
TSSOP–14
DT SUFFIX
CASE 948G
MARKING
DIAGRAMS
14
MC14093BCP
AWLYYWW
1
14
14093B
AWLYWW
1
14
14
093B
ALYW
SOEIAJ–14
F SUFFIX
CASE 965
1
14
MC14093B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14093BCP
PDIP–14
2000/Box
MC14093BD
SOIC–14
2750/Box
MC14093BDR2 SOIC–14 2500/Tape & Reel
MC14093BDT
TSSOP–14
96/Rail
MC14093BDTEL TSSOP–14 2000/Tape & Reel
MC14093BDTR2 TSSOP–14 2500/Tape & Reel
MC14093BF
SOEIAJ–14 See Note 1.
MC14093BFEL SOEIAJ–14 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14093B/D