MC14066B_06 Datasheet, PDF (1/12 Pages) ON Semiconductor – Quad Analog Switch/Quad Multiplexer

MC14066B
Quad Analog Switch/Quad
Multiplexer
The MC14066B consists of four independent switches capable of
controlling either digital or analog signals. This quad bilateral switch
is useful in signal gating, chopper, modulator, demodulator and
CMOS logic implementation.
The MC14066B is designed to be pin−for−pin compatible with the
MC14016B, but has much lower ON resistance. Input voltage swings
as large as the full supply voltage can be controlled via each
independent control input.
Features
• Triple Diode Protection on All Control Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Linearized Transfer Characteristics
• Low Noise − 12 nV/√Cycle, f ≥ 1.0 kHz typical
• Pin−for−Pin Replacement for CD4016, CD4016, MC14016B
• For Lower R_ON, Use The HC4066 High−Speed CMOS Device
• Pb−Free Packages are Available
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD
V_in, V_out
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to V_DD + 0.5
V
I_in
Input Current (DC or Transient)
per Control Pin
± 10
mA
I_SW Switch Through Current
P_D Power Dissipation, per Package
(Note 1)
± 25
mA
500
mW
T_A
Ambient Temperature Range
T_stg Storage Temperature Range
T_L
Lead Temperature
(8−Second Soldering)
−55 to +125
°C
−65 to +150
°C
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP−14
P SUFFIX
CASE 646
MARKING
DIAGRAMS
14
MC14066BCP
AWLYYWWG
1
14
SOIC−14
D SUFFIX
CASE 751A
14066BG
AWLYWW
1
TSSOP−14
DT SUFFIX
CASE 948G
14
14
066B
ALYWG
G
1
SOEIAJ−14
F SUFFIX
CASE 965
14
MC14066B
ALYWG
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
October, 2006 − Rev. 7
Publication Order Number:
MC14066B/D