MC14046B_05 Datasheet, PDF (1/8 Pages) ON Semiconductor – Phase Locked Loop

MC14046B
Phase Locked Loop
The MC14046B phase locked loop contains two phase comparators,
a voltage−controlled oscillator (VCO), source follower, and zener
diode. The comparators have two common signal inputs, PCA_in and
PCB_in. Input PCA_in can be used directly coupled to large voltage
signals, or indirectly coupled (with a series capacitor) to small voltage
signals. The self−bias circuit adjusts small voltage signals in the linear
region of the amplifier. Phase comparator 1 (an exclusive OR gate)
provides a digital error signal PC1_out, and maintains 90° phase shift at
the center frequency between PCA_in and PCB_in signals (both at 50%
duty cycle). Phase comparator 2 (with leading edge sensing logic)
provides digital error signals, PC2_out and LD, and maintains a 0°
phase shift between PCA_in and PCB_in signals (duty cycle is
immaterial). The linear VCO produces an output signal VCO_out
whose frequency is determined by the voltage of input VCO_in and the
capacitor and resistors connected to pins C1_A, C1_B, R1, and R2. The
source−follower output SF_out with an external resistor is used where
the VCO_in signal is needed but no loading can be tolerated. The inhibit
input Inh, when high, disables the VCO and source follower to
minimize standby power consumption. The zener diode can be used to
assist in power supply regulation.
Applications include FM and FSK modulation and demodulation,
frequency synthesis and multiplication, frequency discrimination,
tone decoding, data synchronization and conditioning,
voltage−to−frequency conversion and motor speed control.
Features
• Buffered Outputs Compatible with MHTL and Low−Power TTL
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 to 18 V
• Pin−for−Pin Replacement for CD4046B
• Phase Comparator 1 is an Exclusive OR Gate and is Duty Cycle Limited
• Phase Comparator 2 Switches on Rising Edges and is not Duty Cycle
Limited
• Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD DC Supply Voltage Range
V_in Input Voltage Range (All Inputs)
I_in
DC Input Current, per Pin
P_D Power Dissipation, per Package
(Note 1)
−0.5 to +18.0
V
−0.5 to V_DD + 0.5
V
± 10
mA
500
mW
T_A
Operating Temperature Range
−55 to +125
°C
T_stg Storage Temperature Range
−65 to +150
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16 ¹⁶
P SUFFIX
CASE 648
1
MC14046BCP
AWLYYWWG
16
SOIC−16
DW SUFFIX
CASE 751G
14046BG
AWLYYWW
1
SOEIAJ−16
F SUFFIX
CASE 966
16
MC14046B
ALYWG
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid ap-
plications of any voltage higher than maximum rated
voltages to this high−impedance circuit. For proper op-
eration, V_in and V_out should be constrained to the range
V_SS v (V_in or V_out) v V_DD.
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V_SS or V_DD). Unused out-
puts must be left open.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
August, 2005 − Rev. 10
Publication Order Number:
MC14046B/D