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MC14040B_05 Datasheet, PDF (1/8 Pages) ON Semiconductor – 12−Bit Binary Counter | |||
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MC14040B
12âBit Binary Counter
The MC14040B 12âstage binary counter is constructed with MOS
PâChannel and NâChannel enhancement mode devices in a single
monolithic structure. This part is designed with an input wave shaping
circuit and 12 stages of rippleâcarry binary counter. The device
advances the count on the negativeâgoing edge of the clock pulse.
Applications include time delay circuits, counter controls, and
frequencyâdriving circuits.
Features
⢠Fully Static Operation
⢠Diode Protection on All Inputs
⢠Supply Voltage Range = 3.0 Vdc to 18 Vdc
⢠Capable of Driving Two Lowâpower TTL Loads or One Lowâpower
Schottky TTL Load Over the Rated Temperature Range
⢠Common Reset Line
⢠PinâforâPin Replacement for CD4040B
⢠PbâFree Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
PDIPâ16 16
P SUFFIX
CASE 648
1
MC14040BCP
AWLYYWWG
SOICâ16
D SUFFIX
CASE 751B
16
14040BG
AWLYWW
1
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
â0.5 to +18.0
V
â0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
mA
PD
Power Dissipation, per Package
500
mW
(Note 1)
TA
Ambient Temperature Range
Tstg
Storage Temperature Range
TL
Lead Temperature
(8âSecond Soldering)
â55 to +125
°C
â65 to +150
°C
260
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
Plastic âP and D/DWâ Packages: â 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highâimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
TSSOPâ16
DT SUFFIX
CASE 948F
16
14
040B
ALYW
1
SOEIAJâ16
F SUFFIX
CASE 966
16
MC14040B
ALYWG
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbâFree Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our PbâFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
August, 2005 â Rev. 7
Publication Order Number:
MC14040B/D
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