MC14029B Datasheet, PDF (1/8 Pages) Motorola, Inc – Binary/Decade Up/Down Counter

MC14029B
Binary/Decade Up/Down
Counter
The MC14029B Binary/Decade up/down counter is constructed
with MOS P–channel and N–channel enhancement mode devices in a
single monolithic structure. The counter consists of type D flip–flop
stages with a gating structure to provide toggle flip–flop capability.
The counter can be used in either Binary or BCD operation. This
complementary MOS counter finds primary use in up/down and
difference counting and frequency synthesizer applications where low
power dissipation and/or high noise immunity is desired. It is also
useful in A/D and D/A conversion and for magnitude and sign
generation.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Speed
• Logic Edge–Clocked Design — Count Occurs on Positive Going
Edge of Clock
• Asynchronous Preset Enable Operation
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Pin for Pin Replacement for CD4029B
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
– 0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range – 0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
± 10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8–Second Soldering)
– 55 to +125
°C
– 65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v ^{high–impedance circuit. For proper operation, Vin and Vout should be constrained}
to the range V_SS (V_in or V_out) V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC14029BCP
AWLYYWW
1
SOIC–16
D SUFFIX
CASE 751B
16
14029B
AWLYWW
1
SOEIAJ–16
F SUFFIX
CASE 966
16
MC14029B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14029BCP
PDIP–16
2000/Box
MC14029BD
SOIC–16
2400/Box
MC14029BDR2 SOIC–16 2500/Tape & Reel
MC14029BF
SOEIAJ–16 See Note 1.
MC14029BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14029B/D