MC14022B_14 Datasheet, PDF (1/7 Pages) ON Semiconductor – Octal Counter

MC14022B
Octal Counter
The MC14022B is a four−stage Johnson octal counter with built−in
code converter. High−speed operation and spike−free outputs are
obtained by use of a Johnson octal counter design. The eight decoded
outputs are normally low, and go high only at their appropriate octal
time period. The output changes occur on the positive−going edge of
the clock pulse. This part can be used in frequency division
applications as well as octal counter or octal decode display
applications.
http://onsemi.com
Features
• Fully Static Operation
• DC Clock Input Circuit Allows Slow Rise Times
• Carry Out Output for Cascading
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4022B
• Triple Diode Protection on All Inputs
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
−0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range −0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D
Power Dissipation, per Package
500
mW
(Note 1)
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8−Second Soldering)
−55 to +125
°C
−65 to +150
°C
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
SOIC−16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
Q1 1
Q0 2
Q2 3
Q5 4
Q6 5
NC 6
Q3 7
V_SS 8
16 V_DD
15 R
14 C
13 CE
12 C_out
11 Q4
10 Q7
9 NC
NC = NO CONNECTION
MARKING DIAGRAM
16
14022BG
AWLYWW
1
A
WL
YY, Y
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 8
Publication Order Number:
MC14022B/D