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MC14017B_14 Datasheet, PDF (1/8 Pages) ON Semiconductor – Decade Counter | |||
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MC14017B
Decade Counter
The MC14017B is a fiveâstage Johnson decade counter with
builtâin code converter. High speed operation and spikeâfree outputs
are obtained by use of a Johnson decade counter design. The ten
decoded outputs are normally low, and go high only at their
appropriate decimal time period. The output changes occur on the
positiveâgoing edge of the clock pulse. This part can be used in
frequency division applications as well as decade counter or decimal
decode display applications.
http://onsemi.com
Features
⢠Fully Static Operation
⢠DC Clock Input Circuit Allows Slow Rise Times
⢠Carry Out Output for Cascading
⢠DivideâbyâN Counting
⢠Supply Voltage Range = 3.0 Vdc to 18 Vdc
⢠Capable of Driving Two LowâPower TTL Loads or One LowâPower
Schottky TTL Load Over the Rated Temperature Range
⢠PinâforâPin Replacement for CD4017B
⢠Triple Diode Protection on All Inputs
⢠NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECâQ100
Qualified and PPAP Capable
⢠This Device is PbâFree and is RoHS Compliant
SOICâ16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
Q5 1
Q1 2
Q0 3
Q2 4
Q6 5
Q7 6
Q3 7
VSS 8
16 VDD
15 RESET
14 CLOCK
13 CE
12 Cout
11 Q9
10 Q4
9 Q8
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
â0.5 to +18.0
V
â0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
Tstg
Storage Temperature Range
TL
Lead Temperature
(8âSecond Soldering)
â55 to +125
°C
â65 to +150
°C
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: âD/DWâ Packages: â7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highâimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS ⤠(Vin or Vout) ⤠VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
MARKING DIAGRAM
16
14017BG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbâFree Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 â Rev. 9
Publication Order Number:
MC14017B/D
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