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MC14017BDG Datasheet, PDF (1/8 Pages) ON Semiconductor – Decade Counter
MC14017B
Decade Counter
The MC14017B is a five−stage Johnson decade counter with
built−in code converter. High speed operation and spike−free outputs
are obtained by use of a Johnson decade counter design. The ten
decoded outputs are normally low, and go high only at their
appropriate decimal time period. The output changes occur on the
positive−going edge of the clock pulse. This part can be used in
frequency division applications as well as decade counter or decimal
decode display applications.
Features
• Fully Static Operation
• DC Clock Input Circuit Allows Slow Rise Times
• Carry Out Output for Cascading
• Divide−by−N Counting
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4017B
• Triple Diode Protection on All Inputs
• These Devices are Pb−Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
Tstg
Storage Temperature Range
TL
Lead Temperature
(8−Second Soldering)
−55 to +125
°C
−65 to +150
°C
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16 16
P SUFFIX
CASE 648
1
MC14017BCP
AWLYYWWG
SOIC−16
D SUFFIX
CASE 751B
16
14017BG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
April, 2013 − Rev. 8
Publication Order Number:
MC14017B/D