MC14015B_14 Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual 4-Bit Static Shift Register

MC14015B
Dual 4-Bit Static
Shift Register
The MC14015B dual 4−bit static shift register is constructed with
MOS P−Channel and N−Channel enhancement mode devices in
a single monolithic structure. It consists of two identical, independent
4−state serial−input/parallel−output registers. Each register has
independent Clock and Reset inputs with a single serial Data input.
The register states are type D master−slave flip−flops. Data is shifted
from one stage to the next during the positive−going clock transition.
Each register can be cleared when a high level is applied on the Reset
line. These complementary MOS shift registers find primary use in
buffer storage and serial−to−parallel conversion where low power
dissipation and/or noise immunity is desired.
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Edge−Clocked Flip−Flop Design
• Logic State is Retained Indefinitely with Clock Level either High or
Low; Information is Transferred to the Output only on the
Positive-going Edge of the Clock Pulse
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
http://onsemi.com
SOIC−16
D SUFFIX
CASE 751B
MARKING DIAGRAM
16
14015BG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD
V_in, V_out
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to V_DD + 0.5
V
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D
Power Dissipation, per Package (Note 1)
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8−Second Soldering)
500
mW
−55 to +125
°C
−65 to +150
°C
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V_in and V_out
should be constrained to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V_SS or V_DD). Unused outputs must be left open.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 9
Publication Order Number:
MC14015B/D