MC14013B_14 Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual Type D Flip-Flop

MC14013B
Dual Type D Flip-Flop
The MC14013B dual type D flip−flop is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each flip−flop has independent Data, (D), Direct
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary
outputs (Q and Q). These devices may be used as shift register
elements or as type T flip−flops for counter and toggle applications.
Features
• Static Operation
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Edge−Clocked Flip−Flop Design
• Logic State is Retained Indefinitely with Clock Level either High or
Low; Information is Transferred to the Output only on the
Positive−going Edge of the Clock Pulse
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4013B
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
http://onsemi.com
SOIC−14
D SUFFIX
CASE 751A
SOEIAJ−14
F SUFFIX
CASE 965
TSSOP−14
DT SUFFIX
CASE 948G
PIN ASSIGNMENT
Q_A 1
Q_A 2
C_A 3
R_A 4
D_A 5
S_A 6
V_SS 7
14 V_DD
13 Q_B
12 Q_B
11 C_B
10 R_B
9 D_B
8 S_B
MAXIMUM RATINGS (Voltages Referenced to V_SS)
Symbol
Parameter
Value
Unit
V_DD
V_in, V_out
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
V
−0.5 to V_DD + 0.5
V
I_in, I_out Input or Output Current
(DC or Transient) per Pin
±10
mA
P_D Power Dissipation, per Package
(Note 1)
500
mW
T_A
Ambient Temperature Range
−55 to +125
°C
T_stg Storage Temperature Range
−65 to +150
°C
T_L
Lead Temperature
(8−Second Soldering)
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V_in and V_out should be constrained
to the range V_SS ≤ (V_in or V_out) ≤ V_DD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V_SS or V_DD). Unused outputs must be left open.
MARKING DIAGRAMS
14
14013BG
AWLYWW
1
SOIC−14
14
MC14013B
ALYWG
1
SOEIAJ−14
14
14
013B
ALYW G
G
1
TSSOP−14
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
July, 2014 − Rev. 10
Publication Order Number:
MC14013B/D