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MC14008BCPG Datasheet, PDF (1/8 Pages) ON Semiconductor – 4-Bit Full Adder | |||
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MC14008B
4-Bit Full Adder
The MC14008B 4âbit full adder is constructed with MOS
PâChannel and NâChannel enhancement mode devices in a single
monolithic structure. This device consists of four full adders with fast
internal lookâahead carry output. It is useful in binary addition and
other arithmetic applications. The fast parallel carry output bit allows
highâspeed operation when used with other adders in a system.
Features
⢠LookâAhead Carry Output
⢠Diode Protection on All Inputs
⢠All Outputs Buffered
⢠Supply Voltage Range = 3.0 Vdc to 18 Vdc
⢠Capable of Driving Two LowâPower TTL Loads or One
LowâPower Schottky TTL Load Over the Rated Temperature Range
⢠PinâforâPin Replacement for CD4008B
⢠These Devices are PbâFree and are RoHS Compliant
⢠NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECâQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
â0.5 to +18.0
V
â0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
â55 to +125
°C
Tstg
Storage Temperature Range
â65 to +150
°C
TL
Lead Temperature
(8âSecond Soldering)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic âP and D/DWâ Packages: â 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highâimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIPâ16 16
P SUFFIX
CASE 648
1
MC14008BCP
AWLYYWWG
SOICâ16
D SUFFIX
CASE 751B
16
14008BG
AWLYWW
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbâFree Indicator
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
April, 2013 â Rev. 7
Publication Order Number:
MC14008B/D
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