MC14007UB Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual Complementary Pair Plus Inverter

MC14007UB
Dual Complementary Pair
Plus Inverter
The MC14007UB multi–purpose device consists of three
N–channel and three P–channel enhancement mode devices packaged
to provide access to each device. These versatile parts are useful in
inverter circuits, pulse–shapers, linear amplifiers, high input
impedance amplifiers, threshold detectors, transmission gating, and
functional gating.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Pin–for–Pin Replacement for CD4007A or CD4007UB
• This device has 2 outputs without ESD Protection. Anti–static
precautions must be taken.
MAXIMUM RATINGS (Voltages Referenced to V_SS) (Note 2.)
Symbol
Parameter
Value
Unit
V_DD
DC Supply Voltage Range
– 0.5 to +18.0
V
V_in, V_out Input or Output Voltage Range – 0.5 to V_DD + 0.5
V
(DC or Transient)
I_in, I_out
Input or Output Current
(DC or Transient) per Pin
± 10
mA
P_D
Power Dissipation,
per Package (Note 3.)
500
mW
T_A
Ambient Temperature Range
T_stg
Storage Temperature Range
T_L
Lead Temperature
(8–Second Soldering)
– 55 to +125
°C
– 65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v ^{high–impedance circuit. For proper operation, Vin and Vout should be constrained}
to the range V_SS (V_in or V_out) V_DD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V_SS or V_DD). Unused outputs must be left open.
http://onsemi.com
PDIP–14
P SUFFIX
CASE 646
SOIC–14
D SUFFIX
CASE 751A
MARKING
DIAGRAMS
14
MC14007UBCP
AWLYYWW
1
14
14007U
AWLYWW
1
TSSOP–14
DT SUFFIX
CASE 948G
14
14
007U
ALYW
SOEIAJ–14
F SUFFIX
CASE 965
1
14
MC14007U
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14007UBCP PDIP–14
2000/Box
MC14007UBD
SOIC–14
55/Rail
MC14007UBDR2 SOIC–14 2500/Tape & Reel
MC14007UBDT TSSOP–14
96/Rail
MC14007UBF SOEIAJ–14 See Note 1.
MC14007UBFEL SOEIAJ–14 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14007UB/D