MC12080_13 Datasheet, PDF (1/4 Pages) ON Semiconductor – 1.1 GHz Prescaler

MC12080
1.1 GHz Prescaler
Description
The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler
for low power frequency division of a 1.1 GHz high frequency input
signal. Divide ratio control inputs SW1, SW2 and SW3 select the
required divide ratio of ÷10, ÷20, ÷40, or ÷80.
An external load resistor is required to terminate the output. An
820 W resistor is recommended to achieve a 1.2 V_pp output swing,
when dividing a 1.1 GHz input signal by the minimum divide by ratio
of 10, assuming a 8.0 pF load. Output current can be minimized
dependent on conditions such as output frequency, capacitive load
being driven, and output voltage swing required. Typical values for
load resistors are included in the V_out specification for various divide
ratios at 1.1 GHz input frequency.
Features
• 1.1 GHz Toggle Frequency
• Supply Voltage 4.5 to 5.5 V
• Low Power 3.7 mA Typical at V_CC = 5.0 V
• Operating Temperature Range of −40 to 85°C
• These Devices are Pb−Free and are RoHS Compliant
Table 1. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage, Pin 2
V_CC
−0.5 to 7.0
Vdc
Operating Temperature Range
T_A
−40 to 85
°C
Storage Temperature Range
T_stg
−65 to 150
°C
Maximum Output Current, Pin 4
I_O
10
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
Table 2. ATTRIBUTES
Characteristics
Value
ESD Protection
Human Body Model > 1500 V
Machine Model > 100 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Level 1
Flammability Rating
Oxygen Index: 28 to 34 UL 94 V−0
@ 0.125 in
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
http://onsemi.com
8
1
A
L
Y
W
G
MARKING
DIAGRAM
SOIC−8
D SUFFIX
CASE 751
8
12080
ALYW
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
In ¹
V_CC 2
SW1 3
Out ⁴
8 In
7 _SW3
6 SW2
5 GND
(Top View)
FUNCTION TABLE
SW1
SW2
SW3 Divide Ratio
L
L
L
80
L
L
H
40
L
H
L
40
L
H
H
20
H
L
L
40
H
L
H
20
H
H
L
20
H
H
H
10
NOTE: SW1, SW2 and SW3: H = V_CC, L = Open.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
May, 2013 − Rev. 7
Publication Order Number:
MC12080/D