MC10H604 Datasheet, PDF (1/4 Pages) ON Semiconductor – Registered Hex TTL/ECL Translator

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Registered Hex TTL/ECL
Translator
The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL
translator. The device features differential ECL outputs as well as a choice
between either a differential ECL clock input or a TTL clock input. The
asynchronous master reset control is an ECL level input..
With its differential ECL outputs and TTL inputs the H604 device is ideally
suited for the transmit function of a HPPI bus type board–to–board interface
application. The on chip registers simplify the task of synchronizing the data
between the two boards.
The device is available in either ECL standard: the 10H device is
compatible with MECL 10KH logic levels while the 100H device is
compatible with 100K logic levels.
• Differential 50Ω ECL Outputs
• Choice Between Differential ECL or TTL Clock Input
• Dual Power Supply
• Multiple Power and Ground Pins to Minimize Noise
• Specified Within–Device Skew
LOGIC SYMBOL
1 OF 6 BITS
Dn
Qn
D
Q
Qn
CLK
R
MC10H604
MC100H604
FN SUFFIX
PLASTIC PACKAGE
CASE 776–02
PIN NAMES
PIN
FUNCTION
D0–D5
CLK, CLK
TCLK
MR
Q0–Q5
Q0–Q5
VCCE
VCCT
VEE
TTL Data Inputs
Differential ECL Clock Input
TTL Clock Input
ECL Master Reset Input
True ECL Outputs
Inverted ECL Outputs
ECL VCC (0V)
TTL VCC (+5.0V)
ECL VEE (–5.2V)
TRUTH TABLE
Dn MR TCLK/CLK
L
L
Z
H
L
Z
X
H
X
Z = LOW to HIGH Transition
Qn+1
L
H
L
CLK
CLK
TCLK
*
MR
VBB
* 1. When using MECL inputs, TCLK must be tied to ground (0V).
2. When using only one MECL input, the unused MECL input must be tied
to VBB, and TCLK must be tied to ground (0V).
3. When using TCLK, both MECL inputs must be tied to VEE (–5.2V).
Pinout: 28–Lead PLCC (Top View)
D1 D2 VCCT D3 D4 D5 VCCE
25 24 23 22 21 20 19
D0 26
18 Q5
TCLK 27
17 _Q5
VBB 28
16 _Q4
CLK
15 Q4
CLK 2
MR 3
14 VCCE
13 Q3
VCCE 4
12 Q3
5
6
7
8
9 10 11
Q0 Q0 VEE Q1 Q1 Q2 Q2
9/96
© Motorola, Inc. 1996
2–302
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