MC10H602_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – 9−Bit Latch TTL to ECL Translator

MC10H602, MC100H602
9−Bit Latch TTL to ECL
Translator
Description
The MC10H/100H602 is a 9−bit, dual supply TTL to ECL translator
with latch. Devices in the ON Semiconductor 9−bit translator series
utilize the PLCC−28 for optimal power pinning, signal flow−through
and electrical performance.
The H602 features D−type latches. Latching is controlled by Latch
Enable (LEN), while the Master Reset input resets the latches. A
post−latch logic enable is also provided (ENECL), allowing control of
the output state without destroying latch data. All control inputs are
ECL level.
The 10H version is compatible with MECL 10Ht ECL logic levels.
The 100H version is compatible with 100K levels.
Features
• 9−Bit Ideal for Byte−Parity Applications
• Flow−Through Configuration
• Extra TTL and ECL Power/Ground Pins to Minimize
Switching Noise
• Dual Supply
• 3.5 ns Max D to Q
• PNP TTL Inputs for Low Loading
• Pb−Free Packages are Available*
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxH602G
AWLYYWW
xxx = 10 or 100
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 10
Publication Order Number:
MC10H602/D