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MC10H350 Datasheet, PDF (1/4 Pages) ON Semiconductor – PECL* to TTL Translator(+5 Vdc Power Supply Only)
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
PECL* to TTL Translator
(+5 Vdc Power Supply Only)
The MC10H350 is a member of Motorola’s 10H family of high performance
ECL logic. It consists of 4 translators with differential inputs and TTL outputs.
The 3–state outputs can be disabled by applying a HIGH TTL logic level on the
common OE input.
The MC10H350 is designed to be used primarily in systems incorporating
both ECL and TTL logic operating off a common power supply. The separate
VCC power pins are not connected internally and thus isolate the noisy TTL VCC
runs from the relatively quiet ECL VCC runs on the printed circuit board. The
differential inputs allow the H350 to be used as an inverting or noninverting
translator, or a differential line receiver. The H350 can also drive CMOS with the
addition of a pullup resistor.
• Propagation Delay, 3.5 ns Typical
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VEE = Gnd)
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
VCC
TA
Tstg
7.0
Vdc
0 to +75
°C
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ±5%) (See Note 1)
TA = 0°C to 75°C
Characteristic
Symbol
Min
Max
Unit
Power Supply Current
TTL
ICC
—
ECL
—
20
mA
12
Input Current High
Pin 9
IIH
—
Others
IINH
—
Input Current Low
Pin 9
IIL
—
Others
IINL
—
Input Voltage High
Pin 9
VIH
2.0
Input Voltage Low
Pin 9
VIL
—
Differential Input Voltage (1)
VDIFF
350
Pins 3–6, 11–14 (1)
20
µA
50
–0.6
mA
50
µA
—
Vdc
0.8
Vdc
—
mV
Voltage Common Mode
VCM
2.8
VCC
Vdc
Pins 3–6, 11–14
Output Voltage High
IOH = 3.0 mA
VOH
2.7
—
Vdc
Output Voltage Low
IOL = 20 mA
VOL
—
0.5
Vdc
Short Circuit Current
VOUT = 0 V
IOS
–60
–150
mA
Output Disable Current High
VOUT = 2.7 V
IOZH
—
50
µA
Output Disable Current Low
VOUT = 0.5 V
IOZL
—
–50
µA
(1) Common mode input voltage to pins 3–4, 5–6, 11–12, 13–14 must be between the values of 2.8
V and 5.0 V. This common mode input voltage range includes the differential input swing.
(2) For single ended use, apply 3.75 V (VBB) to either input depending on output polarity required.
Signal level range to other input is 3.3 V to 4.2 V.
(3) Any unused gates should have the inverting inputs tied to VCC and the non–inverting inputs tied
to ground to prevent output glitching.
(4) 1.0 V to 2.0 V w/50 pF into 500 ohms.
*Positive Emitter Coupled Logic
MC10H350
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
9
3
4
2
5
6
7
11
12
10
13
14
15
VCC (+5.0 VDC) = PINS 1 AND 16
GND = PIN 8
DIP
PIN ASSIGNMENT
ECL VCC
1
AOUT
2
AIN
3
AIN
4
BIN
5
BIN
6
BOUT
7
GND
8
16
TTL VCC
15
COUT
14
CIN
13
CIN
12
DIN
11
DIN
10
DOUT
9
OE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
9/96
© Motorola, Inc. 1996
2–57
REV 6