MC10H209_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – Dual 4−5−Input OR/NOR Gate

MC10H209
Dual 4−5−Input OR/NOR
Gate
Description
The MC10H209 is a Dual 4−5−input OR/NOR gate. This MECL
part is a functional/pinout duplication of the MECL III part MC1688.
Features
• Propagation Delay Average, 0.75 ns Typical
• Power Dissipation 125 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K™ Compatible
• Pb−Free Packages are Available*
LOGIC DIAGRAM
4
5
3
6
2
7
9
10
14
11
12
15
13
V_CC1 = PIN 1
V_CC2 = PIN 16
V_EE = PIN 8
DIP
PIN ASSIGNMENT
V_CC1
1
A_OUT
2
A_OUT
3
A_IN
4
A_IN
5
A_IN
6
A_IN
7
V_EE
8
16
V_CC2
15
B_OUT
14
B_OUT
13
B_IN
12
B_IN
11
B_IN
10
B_IN
9
B_IN
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
February, 2006 − Rev. 7
http://onsemi.com
MARKING DIAGRAMS*
CDIP−16
L SUFFIX
CASE 620A
16
MC10H209L
AWLYYWW
1
16
16
1
PDIP−16
P SUFFIX
CASE 648
MC10H209P
AWLYYWW
1
10H209
ALYWG
SOEIAJ−16
CASE 966
1 20
20 ₁
PLLC−20
FN SUFFIX
CASE 775
10H209G
AWLYYWW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Publication Order Number:
MC10H209/D