MC10H174 Datasheet, PDF (1/4 Pages) ON Semiconductor – Dual 4 to Multiplexer

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 4 to 1 Multiplexer
The MC10H174 is a Dual 4–to–1 Multiplexer. This device is a functional/
pinout duplication of the standard MECL 10K part, with 100% improvement in
propagation delay and no increase in power supply current.
• Propagation Delay, 1.5 ns Typical
• Power Dissipation, 305 mW Typical
• Improved Noise Margin 150 mV (over operating voltage and
temperature range)
• Voltage Compensated
• MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
Vdc
50
mA
100
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0°
25°
75°
Characteristic
Symbol Min Max Min Max Min Max Unit
Power Supply Current
IE
Input Current High
IinH
Pins 3–7 & 9–13
Pin 14
— 80 — 73 —
— 475 — 300 —
— 670 — 420 —
80 mA
µAdc
300
420
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
AC PARAMETERS
IinL
VOH
VOL
VIH
VIL
0.5 — 0.5 — 0.3
—
µA
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc
Propagation Delay
Data
Select (A, B)
Enable
tpd
ns
0.7 2.4 0.8 2.5 0.9 2.6
1.0 2.8 1.1 2.9 1.2 3.2
0.4 1.45 0.4 1.5 0.5 1.7
Rise Time
tr
0.5 1.5 0.5 1.6 0.5 1.7 ns
Fall Time
tf
0.5 1.5 0.5 1.6 0.5 1.7 ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated
through a 50–ohm resistor to –2.0 volts.
MC10H174
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
TRUTH TABLE
ENABLE ADDRESS INPUTS
E
B
A
H
X
X
L
L
L
L
L
H
L
H
L
OUTPUTS
ZW
L
L
X0 Y0
X1 Y1
X2 Y2
L
H
H
X3 Y3
DIP
PIN ASSIGNMENT
VCC1
1
Q0
2
DO0
3
DO2
4
DO1
5
DO3
6
A
7
VEE
8
16
VCC2
15
Q1
14
ENABLE
13
D10
12
D12
11
D11
10
D13
9
B
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
9/96
© Motorola, Inc. 1996
2–73
REV 6