MC10H164 Datasheet, PDF (1/8 Pages) ON Semiconductor – 8-Line Multiplexer

MC10H164
8-Line Multiplexer
The MC10H164 is a MECL 10H part which is a functional/pinout
duplication of the standard MECL 10K family part, with 100%
improvement in propagation delay, and no increase in power supply
current.
The MC10H164 is designed to be used in data multiplexing and
parallel to serial conversion applications. Full parallel gating provides
equal delays through any data path. The MC10H164 incorporates an
output buffer, eight inputs and an enable. A high on the enable forces
the output low. The open emitter output allows the MC10H164 to be
connected directly to a data bus. The enable line allows an easy means
of expanding to more than 8 lines using additional MC10H164’s.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation, 310 mW Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
A7
B9
C 10
Enable 2
X0 6
X1 5
X2 4
X3 3
X4 11
X5 12
X6 13
X7 14
LOGIC DIAGRAM
VCC1 =
VCC2 =
VEE =
PIN 1
PIN 16
PIN 8
Z
15
DIP PIN ASSIGNMENT
VCC1 1 16 VCC2
ENABLE 2 15 Z
X3 3 14 X7
X2 4 13 X6
X1 5 12 X5
X0 6 11 X4
A 7 10 C
VEE 8
9B
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10H164L
AWLYYWW
1
16
MC10H164P
AWLYYWW
1
1
10H164
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
TRUTH TABLE
ADDRESS INPUTS
ENABLE
C
B
A
Z
L
L
L
L
X0
L
L
L
H
X1
L
L
H
L
X2
L
L
H
H
X3
L
H
L
L
X4
L
H
L
H
X5
L
H
H
L
X6
L
H
H
H
X7
H
X
X
X
L
ORDERING INFORMATION
Device
Package
Shipping
MC10H164L
CDIP–16
25 Units/Rail
MC10H164P
PDIP–16
25 Units/Rail
MC10H164FN PLCC–20
46 Units/Rail
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 7
Publication Order Number:
MC10H164/D