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MC10H161_00 Datasheet, PDF (1/8 Pages) ON Semiconductor – Binary to 1-8 Decoder
MC10H161
Binary to 1-8 Decoder
(Low)
The MC10H161 provides parallel decoding of a three bit binary
word to one of eight lines. The MC10H161 is useful in high–speed
multiplexer/demultiplexer applications.
The MC10H161 is designed to decode a three bit input word to one
of eight output lines. The MC10H161 output will be low when
selected while all other output are high. The enable inputs, when either
or both are high, force all outputs high.
The MC10H161 is a true parallel decoder. This eliminates unequal
parallel path delay times found in other decoder designs. These
devices are ideally suited for multiplexer/demultiplexer applications.
• Propagation Delay, 1.0 ns Typical
• Power Dissipation, 315 mW Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
LOGIC DIAGRAM
E0 2
E1 15
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
6 Q0
5 Q1
4 Q2
A7
3 Q3
13 Q4
B9
12 Q5
11 Q6
C 14
10 Q7
TRUTH TABLE
ENABLE
INPUTS
E1 E0
LL
LL
LL
LL
LL
LL
LL
LL
HX
XH
INPUTS
CB A
L LL
L LH
L HL
L HH
HLL
H LH
HHL
H HH
X XX
X XX
OUTPUTS
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L H H H H HH H
H L H H H HH H
H H L H H HH H
H H H L H HH H
H H H H L HH H
H HHHH LHH
H HHHH HL H
H H H H H HH L
H H H H H HH H
H H H H H HH H
DIP PIN ASSIGNMENT
VCC1 1 16 VCC2
E0 2 15 E1
Q3 3 14 C
Q2 4 13 Q4
Pin assignment is for Dual–in–Line
Package. For PLCC pin assignment, see
the Pin Conversion Tables on page 18 of
Q1 5 12 Q5
Q0 6 11 Q6
the ON Semiconductor MECL Data
Book (DL122/D).
A 7 10 Q7
VEE 8
9B
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10H161L
AWLYYWW
1
16
MC10H161P
AWLYYWW
1
1
10H161
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10H161L
CDIP–16
25 Units/Rail
MC10H161P
PDIP–16
25 Units/Rail
MC10H161FN PLCC–20
46 Units/Rail
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 6
Publication Order Number:
MC10H161/D