MC10H100 Datasheet, PDF (1/4 Pages) ON Semiconductor – Quad 2 - input NOR GATE With strobe

MC10H100
Quad 2-Input NOR Gate
With Strobe
The MC10H100 is a quad NOR gate. Each gate has 3 inputs, two of
which are independent and one of which is tied common to all four
gates.
• Propagation Delay, 1.0 ns Typical
• 25 mW Typ/Gate (No Load)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K–Compatible
LOGIC DIAGRAM
4
5
6
7
9
10
11
12
13
2=4+5+9
2
3
14
15
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
1
16
VCC2
AOUT
2
15
DOUT
BOUT
3
14
COUT
AIN
4
13
DIN
AIN
5
12
DIN
BIN
6
11
CIN
BIN
7
VEE
8
10
CIN
9
COMMON
INPUT
(A, B, C, D)
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10H100L
AWLYYWW
1
16
MC10H100P
AWLYYWW
1
1
10H100
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10H100L
CDIP–16
25 Units/Rail
MC10H100P
PDIP–16
25 Units/Rail
MC10H100FN PLCC–20
46 Units/Rail
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 6
Publication Order Number:
MC10H100/D