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MC10EPT20_06 Datasheet, PDF (1/10 Pages) ON Semiconductor – 3.3V LVTTL/LVCMOS to Differential LVPECL Translator | |||
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MC10EPT20, MC100EPT20
3.3V LVTTL/LVCMOS to
Differential LVPECL
Translator
The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL
translator. Because PECL (Positive ECL) levels are used, only +3.3 V
and ground are required. The small outline SOICâ8 package and the
single gate of the EPT20 makes it ideal for those applications where
space, performance, and low power are at a premium.
The 100 Series contains temperature compensation.
Features
⢠390 ps Typical Propagation Delay
⢠Maximum Input Clock Frequency > 1 GHz Typical
⢠Operating Range VCC = 3.0 V to 3.6 V
with GND = 0 V
⢠PNP TTL Input for Minimal Loading
⢠Q Output will Default HIGH with Input Open
⢠PbâFree Packages are Available
http://onsemi.com
8
1
SOâ8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HPT20
ALYW
G
1
8
KPT20
ALYW
G
1
8
1
TSSOPâ8
DT SUFFIX
CASE 948R
8
HA20
ALYWG
G
1
8
KA20
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A
K = MC100
L
5W = MC10
Y
3Q = MC100
W
M = Date Code G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbâFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 â Rev. 9
Publication Order Number:
MC10EPT20/D
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