MC10EP451_06 Datasheet, PDF (1/10 Pages) ON Semiconductor – 3.3V / 5V ECL 6−Bit Differential Register with Master Reset

MC10EP451, MC100EP451
3.3V / 5V ECL 6−Bit
Differential Register with
Master Reset
Description
The MC10/100EP451 is a 6−bit fully differential register with
common clock and single−ended Master Reset (MR). It is ideal for
very high frequency applications where a registered data path is
necessary.
All inputs have a 75 kW pulldown resistor internally. Differential
inputs have an override clamp. Unused differential register inputs can
be left open and will default LOW. When the differential inputs are
forced to < V_EE + 1.2 V, the clamp will override and force the output to
a default state. When in the default state, and since the flip−flop is edge
triggered, the output reaches a determined, but not predicted, valid
state.
The positive transition of CLK (pin 4) will latch the registers.
Master Reset (MR) HIGH will asynchronously reset all registers
forcing Q outputs to go LOW.
The 100 Series contains temperature compensation.
Features
• 450 ps Typical Propagation Delay
• Maximum Frequency > 3.0 GHz Typical
• Asynchronous Master Reset
• 20 ps Skew Within Device, 35 ps Skew Device−To−Device
• PECL Mode Operating Range: V_CC = 3.0 V to 5.5 V
With V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
With V_EE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
MARKING
DIAGRAM*
LQFP−32
FA SUFFIX
CASE 873A
MCxxx
EP451
AWLYYWWG
32
1
1 32
QFN32
MN SUFFIX
CASE 488AM
1
MCxxx
EP451
ALYWG
xxx = 10 or 100
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
March, 2006 − Rev. 8
Publication Order Number:
MC10EP451/D