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MC10EP33_16 Datasheet, PDF (1/11 Pages) ON Semiconductor – Divider | |||
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MC10EP33, MC100EP33
3.3âV/5âVâECL B4 Divider
Description
The MC10/100EP33 is an integrated B4 divider. The differential
clock inputs.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The reset pin is asynchronous and is asserted on the rising edge.
Upon powerup, the internal flip-flops will attain a random state; the
reset allows for the synchronization of multiple EP33âs in a system.
The 100 Series contains temperature compensation.
Features
⢠320 ps Propagation Delay
⢠Maximum Frequency = > 4 GHz Typical
⢠PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
⢠NECL Mode Operating Range:
VCC = 0 V with VEE = â3.0 V to â5.5 V
⢠Open Input Default State
⢠Safety Clamp on Inputs
⢠Q Output Will Default LOW with Inputs Open or at VEE
⢠VBB Output
⢠These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
8
1
8
1
SOICâ8 NB
TSSOPâ8
DFN8
D SUFFIX
DT SUFFIX MN SUFFIX
CASE 751â07 CASE 948Râ02 CASE 506AA
MARKING DIAGRAMS*
8
HEP64
ALYW
G
1
8
HP64
ALYWG
G
1
14
8
KEP64
ALYW
G
1
SOICâ8 NB
8
KP64
ALYWG
G
1
TSSOPâ8
14
DFN8
H = MC10 A = Assembly Location
K = MC100 L = Wafer Lot
5Q = MC10 Y = Year
3L = MC100 W = Work Week
M = Date Code
G = Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
August, 2016 â Rev. 11
Publication Order Number:
MC10EP33/D
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