MC10EP105_06 Datasheet, PDF (1/11 Pages) ON Semiconductor – 3.3V / 5V ECL Quad 2−Input Differential AND/NAND

MC10EP105, MC100EP105
3.3V / 5V ECL Quad 2−Input
Differential AND/NAND
Description
The MC10/100EP105 is a quad 2−input differential AND/NAND
gate. Each gate is functionally equivalent to the EP05 and LVEL05
devices. With AC performance much faster than the LVEL05 device,
the EP105 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
Features
• 275 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range: V_CC = 3.0 V to 5.5 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS*
LQFP−32
FA SUFFIX
CASE 873A
MCxxx
EP105
AWLYYWWG
1 32
QFN32
MN SUFFIX
CASE 488AM
1
MCxxx
EP105
AWLYYWWG
G
xxx = 10 or 100
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 11
Publication Order Number:
MC10EP105/D