MC10EP05_06 Datasheet, PDF (1/11 Pages) ON Semiconductor – 3.3V / 5V ECL 2−Input Differential AND/NAND

MC10EP05, MC100EP05
3.3V / 5V ECL 2−Input
Differential AND/NAND
Description
The MC10/100EP05 is a 2−input differential AND/NAND gate.
The device is functionally equivalent to the EL05 and LVEL05
devices. With AC performance much faster than the LVEL05 device,
the EP05 is ideal for applications requiring the fastest
AC performance available.
The 100 Series contains temperature compensation.
Features
• 220 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range: V_CC = 3.0 V to 5.5 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output Will Default LOW with Inputs Open or at V_EE
• Pb−Free Packages are Available
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HEP05
ALYWG
G
1
8
KEP05
ALYWG
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HP05
ALYWG
G
1
8
KP05
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A = Assembly Location
K = MC100
L = Wafer Lot
5I = MC10
Y = Year
2X = MC100
W = Work Week
D = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 8
Publication Order Number:
MC10EP05/D