MC10EP016_06 Datasheet, PDF (1/14 Pages) ON Semiconductor – 3.3V / 5V ECL 8−Bit Synchronous Binary Up Counter

MC10EP016, MC100EP016
3.3V / 5V ECL 8−Bit
Synchronous Binary
Up Counter
The MC10/100EP016 is a high−speed synchronous, presettable,
cascadeable 8−bit binary counter. Architecture and operation are the
same as the MC10E016 in the ECLinPS™ family.
The counter features internal feedback to TC gated by the TCLD
(Terminal Count Load) pin. When TCLD is LOW (or left open, in
which case it is pulled LOW by the internal pulldowns), the TC
feedback is disabled, and counting proceeds continuously, with TC
going LOW to indicate an all−one state. When TCLD is HIGH, the TC
feedback causes the counter to automatically reload upon TC = LOW,
thus functioning as a programmable counter. The Qn outputs do not
need to be terminated for the count function to operate properly. To
minimize noise and power, unused Q outputs should be left
unterminated.
COUT and COUT provide differential outputs from a single,
non−cascaded counter or divider application. COUT and COUT
should not be used in cascade configuration. Only TC should be used
for a counter or divider cascade chain output.
A differential clock input has also been added to improve
performance.
The 100 Series contains temperature compensation.
• 500 ps Typical Propagation Delay
• PECL Mode Operating Range: V_CC = 3.0 V to 5.5 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −3.0 V to −5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Internal TC Feedback (Gated)
• Addition of COUT and COUT
• 8−Bit
• Differential Clock Input
• V_BB Output
• Fully Synchronous Counting and TC Generation
• Asynchronous Master Reset
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAM*
LQFP−32
FA SUFFIX
CASE 873A
MCxxx
EP016
AWLYYWWG
xxx = 10 or 100
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
January, 2006 − Rev. 11
Publication Order Number:
MC10EP016/D