MC10ELT28_06 Datasheet, PDF (1/9 Pages) ON Semiconductor – 5 V TTL to Differential PECL and Differential PECL to TTL Translator

MC10ELT28, MC100ELT28
5 V TTL to Differential
PECL and Differential PECL
to TTL Translator
Description
The MC10ELT/100ELT28 is a differential PECL to TTL translator
and a TTL to differential PECL translator in a single package. Because
PECL (Positive ECL) levels are used, only +5 V and ground are
required. The small outline 8-lead package and the dual translation
design of the ELT28 makes it ideal for applications which are sending
and receiving signals across a backplane.
The 100 Series contains temperature compensation.
Features
• 3.5 ns Typical PECL to TTL Propagation Delay
• 1.2 ns Typical TTL to PECL Propagation Delay
• PNP TTL Inputs for Minimal Loading
• 24 mA TTL Outputs
• Flow Through Pinouts
• Operating Range V_CC= 4.75 V to 5.25 V with GND= 0 V
• Q_TTL Output Will Default High with Inputs Left Open or < 1.3 V
• Q_ECL Output Will Default High with Inputs Left Open
• Internal PECL Input Pulldown Resistors
• Pb−Free Packages are Available
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HLT28
ALYW
G
1
8
KLT28
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HT28
ALYWG
G
1
8
KT28
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A = Assembly Location
K = MC100
L = Wafer Lot
5G = MC10
Y = Year
2V = MC100
W = Work Week
M = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 9
Publication Order Number:
MC10ELT28/D