MC10ELT25_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – −5 V Differential ECL to TTL Translator

MC10ELT25, MC100ELT25
−5 V Differential ECL to TTL
Translator
Description
The MC10ELT/100ELT25 is a differential ECL to TTL translator.
Because ECL levels are used, a +5 V, −5.2 V (or −4.5 V) and ground
are required. The small outline 8-lead package and the single gate of
the ELT25 makes it ideal for those applications where space,
performance and low power are at a premium.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
The 100 Series contains temperature compensation.
Features
• 2.6 ns Typical Propagation Delay
• 100 MHz F_MAX CLK
• 24 mA TTL Outputs
• Flow Through Pinouts
• Operating Range: V_CC = 4.5 V to 5.5 V with GND = 0 V;
V_EE = −4.2 V to −5.7 V with GND = 0 V
• Internal Input 50 KW Pulldown Resistors
• Q Output will default HIGH with inputs open or < 1.3 V
• Pb−Free Packages are Available
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HLT25
ALYW
G
1
8
KLT25
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HT25
ALYWG
G
1
8
KT25
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A = Assembly Location
K = MC100
L = Wafer Lot
5F = MC10
Y = Year
2U = MC100
W = Work Week
M = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 12
Publication Order Number:
MC10ELT25/D