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MC10EL35_16 Datasheet, PDF (1/7 Pages) ON Semiconductor – 5 V ECL JK Flip‐Flop | |||
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MC10EL35, MC100EL35
5 V ECL JK FlipâFlop
Description
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data
enters the master portion of the flip-flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the clock. The reset pin is asynchronous and is activated with a logic
HIGH.
The 100 Series contains temperature compensation.
Features
⢠525 ps Propagation Delay
⢠2.2G Hz Toggle Frequency
⢠ESD Protection:
⦠> 1 kV Human Body Model
⦠> 100 V Machine Model
⢠PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V
⢠NECL Mode Operating Range: VCC = 0 V with
VEE = â4.2 V to â5.7 V
⢠Internal Input Pulldown Resistors on J, K, CLK, and R
⢠Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
⢠Moisture Sensitivity:
⦠Level 1 for SOICâ8 NB
⦠Level 3 for TSSOPâ8
⦠For Additional Information, see Application Note AND8003/D
⢠Flammability Rating: ULâ94 Vâ0 @ 0.125 in,
Oxygen Index 28 to 34
⢠Transistor Count = 81 Devices
⢠These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
8
1
SOICâ8 NB
D SUFFIX
CASE 751â05
8
1
TSSOPâ8
DT SUFFIX
CASE 948Râ02
MARKING DIAGRAMS*
8
HEL35
ALYW
G
1
8
HL35
ALYWG
G
1
8
KEL35
ALYW
G
1
8
KL35
ALYWG
G
1
SOICâ8
TSSOPâ8
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MC10EL35DG
MC10EL35DTG
MC100EL35DG
MC100EL35DTG
Package
SOICâ8 NB
(Pb-Free)
TSSOPâ8
(Pb-Free)
SOICâ8 NB
(Pb-Free)
TSSOPâ8
(Pb-Free)
Shipping
98 Units / Tube
100 Unit / Tube
98 Units / tube
100 Units / Tube
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 â Rev. 8
Publication Order Number:
MC10EL35/D
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