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MC10EL32 Datasheet, PDF (1/3 Pages) ON Semiconductor – ÷2 Divider
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
÷2 Divider
The MC10EL/100EL32 is an integrated ÷2 divider. The differential
clock inputs and the VBB allow a differential, single-ended or AC coupled
interface to the device. If used, the VBB output should be bypassed to
ground with a 0.01µF capacitor. Also note that the VBB is designed to be
used as an input bias on the EL32 only, the VBB output has limited current
sink and source capability.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flop will attain a random state; the reset
allows for the synchronization of multiple EL32’s in a system.
• 510ps Propagation Delay
• 3.0GHz Toggle Frequency
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• >1000V ESD Protection
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Reset 1
CLK 2
CLK 3
8 VCC
R
7Q
÷2
6Q
VBB 4
5 VEE
MC10EL32
MC100EL32
8
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751-05
PIN DESCRIPTION
PIN
CLK
Reset
VBB
Q
FUNCTION
Clock Inputs
Asynch Reset
Ref Voltage Output
Data Ouputs
5/95
© Motorola, Inc. 1996
3–1
REV 3