MC10E451_16 Datasheet, PDF (1/9 Pages) ON Semiconductor – 5 V ECL 6-Bit D Register Differential Data and Clock

MC10E451, MC100E451
5 V ECL 6-Bit D Register
Differential Data and Clock
Description
The MC10E/100E451 contains six D-type flip-flops with
single-ended outputs and differential data inputs. The common clock
input is also differential. The registers are triggered by a positive
transition of the positive clock (CLK) input.
A HIGH on the Master Reset (MR) input resets all Q outputs to
LOW.
The differential input structures are clamped so that the inputs of
unused registers can be left open without upsetting the bias network of
the device. The clamping action will assert the D and the CLK sides of
the inputs. Because of the edge triggered flip-flop nature of the device
simultaneously opening both the clock and data inputs will result in an
output which reaches an unidentified but valid state. Note that the
input clamps only operate when both inputs fall to 2.5 V below V_CC.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
The 100 Series contains temperature compensation.
Features
• Differential Inputs: Data and Clock
• V_BB Output
• 1100 MHz Min. Toggle Frequency
• Asynchronous Master Reset
• PECL Mode Operating Range:
V_CC = 4.2 V to 5.7 V with V_EE = 0 V
• NECL Mode Operating Range:
V_CC = 0 V with V_EE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection:
♦ > 2 kV Human Body Model
♦ > 200 V Machine Model
• Transistor Count = 348 Devices
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D)
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
PLCC−28
FN SUFFIX
CASE 776−02
MARKING DIAGRAM*
1 28
MCxxxE451FNG
AWLYYWW
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
G
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping†
MC10E451FNG
PLCC−28 37 Units / Tube
(Pb-Free)
MC10E451FNR2G
PLCC−28 500 Tape & Reel
(Pb-Free)
MC100E451FNG
PLCC−28
(Pb-Free)
37 Units / Tube
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 − Rev. 10
Publication Order Number:
MC10E451/D