MC10E446_06 Datasheet, PDF (1/12 Pages) ON Semiconductor – 5V ECL 4-Bit Parallel/Serial Converter

MC10E446, MC100E446
5V ECL 4-Bit Parallel/Serial
Converter
Description
The MC10E/100E446 is an integrated 4-bit parallel to serial data
converter. The device is designed to operate for NRZ data rates of up to
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1.3 Gb/s. The chip generates a divide by 4 and a divide by 8 clock for
both 4-bit conversion and a two chip 8-bit conversion function. The
conversion sequence was chosen to convert the parallel data into a serial
stream from bit D0 to D3. A serial input is provided to cascade two
E446 devices for 8 bit conversion applications. Note that the serial
PLCC−28
FN SUFFIX
CASE 776
output data clocks off of the negative input clock transition.
The SYNC input will asynchronously reset the internal clock
circuitry. This pin allows the user to reset the internal clock conversion
unit and thus select the start of the conversion process.
The MODE input is used to select the conversion mode of the device.
MARKING DIAGRAM*
1 28
With the MODE input LOW, or open, the device will function as a 4-bit
converter. When the mode input is driven HIGH the internal load clock
will change on every eighth clock cycle thus allowing for an 8-bit
MCxxxE446FNG
conversion scheme using two E446’s. When cascaded in an 8-bit
AWLYYWW
conversion scheme the devices will not operate at the 1.3 Gb/s data rate
of a single device. Refer to the applications section of this data sheet for
more information on cascading the E446.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB and
V_CC via a 0.01 mF capacitor and limit current sourcing or sinking to
0.5 mA. When not used, V_BB should be left open.
The 100 Series contains temperature compensation.
Features
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
• On Chip Clock ÷4 and ÷8
• 1.5 Gb/s Typical Data Rate Capability
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
• Differential Clock and Serial Inputs
• V_BB Output for Single-ended Input Applications
• Asynchronous Data Synchronization
• Mode Select to Expand to 8 Bits
• PECL Mode Operating Range: V_CC = 4.2 V to 5.7 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC
Latchup Test
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 525 devices
• Moisture Sensitivity Level: Pb = 1; Pb−Free = 3
For Additional Information, see Application Note
AND8003/D
• Pb−Free Packages are Available*
Machine Model; > 100 V
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 8
Publication Order Number:
MC10E446/D