MC10E445 Datasheet, PDF (1/8 Pages) ON Semiconductor – 4-BIT SERIAL/ PARALLEL CONVERTER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4ĆBit Serial/Parallel Converter
The MC10/100E445 is an integrated 4-bit serial to parallel data
converter. The device is designed to operate for NRZ data rates of up to
2.0Gb/s. The chip generates a divide by 4 and a divide by 8 clock for both
4-bit conversion and a two chip 8-bit conversion function. The conversion
sequence was chosen to convert the first serial bit to Q0, the second to
Q1 etc.
MC10E445
MC100E445
• On-Chip Clock ÷4 and ÷8
• 2.0Gb/s Data Rate Capability
• Differential Clock and Serial Inputs
• VBB Output for Single-Ended Input Applications
• Asynchronous Data Synchronization
• Mode Select to Expand to 8-Bits
• Internal 75kΩ Input Pulldown Resistors
• Extended 100E VEE Range of –4.2V to –5.46V
4-BIT SERIAL/
PARALLEL CONVERTER
Two selectable serial inputs provide a loopback capability for testing
purposes when the device is used in conjunction with the E446 parallel to
serial converter.
The start bit for conversion can be moved using the SYNC input. A
single pulse applied asynchronously for at least two input clock cycles
shifts the start bit for conversion from Qn to Qn–1. For each additional
shift required an additional pulse must be applied to the SYNC input.
Asserting the SYNC input will force the internal clock dividers to “swallow”
a clock pulse, effectively shifting a bit from the Qn to the Qn–1 output (see
Timing Diagram B).
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
The MODE input is used to select the conversion mode of the device. With the MODE input LOW, or open, the device will
function as a 4-bit converter. When the mode input is driven HIGH the data on the output will change on every eighth clock cycle
thus allowing for an 8-bit conversion scheme using two E445’s. When cascaded in an 8-bit conversion scheme the devices will
not operate at the 2.0Gb/s data rate of a single device. Refer to the applications section of this data sheet for more information on
cascading the E445.
For lower data rate applications a VBB reference voltage is supplied for single-ended inputs. When operating at clock rates
above 500MHz differential input signals are recommended. For single-ended inputs the VBB pin is tied to the inverting differential
input and bypassed via a 0.01µF capacitor. The VBB provides the switching reference for the input differential amplifier. The VBB
can also be used to AC couple an input signal, for more information on AC coupling refer to the interfacing section of the design
guide in the ECLinPS™ data book.
Upon power-up the internal flip-flops will attain a random state. To synchronize multiple E445’s in a system the master reset
must be asserted.
PIN NAMES
Pin
SINA, SINA
SINB, SINB
SEL
Q0–Q3
CLK, CLK
CL/4, CL/4
CL/8, CL/8
MODE
SYNCH
Function
Differential Serial Data Input A
Differential Serial Data Input B
Serial Input Selector Pin
Parallel Data Outputs
Differential Clock Inputs
Differential ÷4 Clock Output
Differential ÷8 Clock Output
Conversion Mode 4-Bit/8-Bit
Conversion Synchronizing Input
FUNCTION TABLES
Mode
Conversion
SEL
L
4-Bit
H
H
8-Bit
L
Serial Input
A
B
SINA SINA
MODE NC VCCO
25 24 23 22 21 20 19
SINB 26
18
SINB 27
17
SEL 28
16
VEE
1 ^{Figure 1. 28–Lead Pinout} 15
(Top View)
CLK 2
14
CLK 3
13
VBB 4
12
5 6 7 8 9 10 11
CL/8 CL/8 VCCO CL/4 CL/4 VCCO Q3
SOUT
SOUT
VCC
Q0
Q1
VCCO
Q2
8/97
© Motorola, Inc. 1997
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