MC10E411_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – 5V ECL 1:9 Differential PECL/NECL RAMBus Clock Buffer

MC10E411
5V ECL 1:9 Differential
PECL/NECL RAMBus Clock
Buffer
Description
The MC10E411 is a low skew 1-to-9 differential driver, designed
with clock distribution in mind. The MC10E411’s function and
performance are similar to the popular MC10E111, with the added
feature of 1.2 V output swings.
The output voltage swing of the E411 is larger than a standard ECL
swing. The 1.2 V output swings provide a signal which can be AC
coupled into RAMBus compatible input loads. The larger output
swings are produced by lowering the V_OL of the device. With the
exception of the lower V_OL, the E411 is identical to the MC10E111.
Note that the larger output swings eliminate the possibility of
temperature compensated outputs, thus the E411 is only available in
the 10E style of ECL. In addition, because the V_OL is lower than
standard ECL, the outputs cannot be terminated to −2.0 V. This data
sheet provides a few termination alternatives.
The device TPD is affected by the quantity of output pairs
terminated with minimum occurring with only one output pair and
increasing about 10 − 20 ps for all output pairs. Relative skew
distribution is not affected as more pairs are terminated, but the
increased TPD does shift the entire distribution. Unused output pairs
should be left unterminated (open) to reduce power and switching
noise.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1 28
MC10E411FNG
AWLYYWW
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Features
• 200 ps Part-to-Part Skew
• 50 ps Output-to-Output Skew
• Differential Design
• V_BB Output
• Voltage Compensated Outputs
• PECL Mode Operating Range:
V_CC = 4.5 V to 5.5 V with V_EE = 0 V
• NECL Mode Operating Range:
V_CC = 0 V with V_EE = −4.5 V to −5.5 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Spec EIA/JESD78
IC Latchup Test
• Moisture Sensitivity Level: Pb = 1; Pb−Free = 3
For Additional Information, see Application Note
AND8003/D
• Flammability Rating: UL 94 V−0 @ 1.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 180 devices
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 8
Publication Order Number:
MC10E411/D